We can supply waxless mount assemblies for single-side polishing of silicon wafers of all diameters.
Our templates are manufactured using a buffed porous mounting material that, when wet, produces the necessary adhesion to hold the wafer in place. To ensure that the wafer stays in place an FR-4 template is added. The buffed mounting material allows the wafer to rotate in the pocket.
Our templates are made flat to stay flat. A non-absorbent, non-compressible fabric backs the buffed poromeric material. The pad stays resilient evenly across the full width of the recess, producing measurably flatter wafers.
Each template is backed with a pressure-sensitive adhesive, specifically suited to withstand the effects of the polishing process. Our templates are assembled in a clean, climate-controlled environment to limit particle contamination. All template edges are milled smooth to prevent shredding during the polishing process. The final product is sealed, in one-load packages, to keep templates clean and uncontaminated until use.

Standard Features

• Flat - a non-absorbent, incompressible fabric backs the buffed poromeric. The pad stays resilient evenly across the full width of the recess, run after run, producing measurably flatter wafers.
• Long-Lasting - Adhesives specifically selected for this application withstand the effects of the polishing process.
• Clean - Templates are assembled in a clean, climate-controlled environment to limit particle contamination.
• Prevent Scratches - All edges of the FR-4 template are milled smooth to prevent shedding of glass fibres during polishing.
• Load Size Packaging - Templates are sealed in durable plastic sleeves. Each package contains only enough templates for one machine load to keep them free of contamination until use.
• Easy Installation - The template assembly is backed with a pressure-sensitive adhesive. Just peel away the release paper and press the assembly onto the carrier.
• Common sizes - Template sizes for common silicon polishers are available to hold standard wafer diameters.